1. Field of the Invention
The present invention relates generally to card insertion circuitry for an open drain MOSFET backplane system. More particularly, the present invention relates to circuit board insertion circuitry useful with a staggered backplane connector, where the insertion circuitry guarantees that when a connection with the backplane data bus is initially established, the circuit board will present a tristated output to the data bus. The present invention has particular application to data communications and telecommunications switching systems, although it is not limited thereto. In addition, the present invention has particular application to a backplane using Gunning Transceiver Logic (GTL), although it may be applied to any open-drain logic, whether utilizing NMOS, or CMOS technology.
2. State of the Art
Present day data communications and telecommunications switching systems often rely upon a backplane based architecture, with a plurality of circuit boards or cards which are plugged in, or otherwise connected to the backplane. Open drain MOSFET transceivers such as are used in conjunction with Gunning Transceiver Logic (GTL) provide an attractive interface technique for such backplane based systems. An example of such an open drain MOSFET transceiver is seen prior art FIG. 1, where the transceiver chip 10 has a driving circuit including a bias or control circuit 15, and a transistor M1 which is provided with its drain coupled to the GTL data bus 20, its source coupled to ground, and its gate controlled by the control circuit 15. In a GTL system, the control circuit 15 typically has a 5 V and may have a 3.3 V supply, with the 5 V supply coming from a 5 V bus 40 which is coupled to the 5 V backplane voltage rail (not shown) at 45 by an electrical connector. The receiver of the transceiver is shown as an amplifier 30, although additional receiver circuitry would typically be included. The transceiver also includes protection circuit diodes 32, 34 which protect the MOSFETs in the receiver circuit from overvoltages typically caused by electrostatic discharges. Additional details regarding GTL circuits and transceivers may be found by reference to U.S. Pat. No. 5,023,488 to Gunning et al.
While GTL circuits are extremely useful in certain applications, in a high reliability backplane such as that required for a data communications or telecommunications switching system, two major drawbacks are present in the current state of the open drain art. First, the insertion of a card into an active backplane may cause errors on the data bus 15, as there is no guarantee in the art that open drain logic (transistor M1) will be OFF (i.e., nonconducting) upon insertion. Second, because the MOS circuits include the diode-based input protection circuitry (diodes 32,34), a card with a power fault may cause a system-wide failure. In particular, a short from power to ground on any card could cause the input protection diode D3 to become forward biased. Forward biasing of this diode would cause an appreciable drop in the "logic high" electrical level of the bus, leading to data loss in a bus scheme which calls for low voltage swings (such as the 1.2 V GTL bus). Furthermore, since appreciable current can flow through the diode D3, damage to the transceiver chip may occur.